Design of a 4-bit 2's Complement Reversible Circuit for Arithmetic Logic Unit Applications
Vandana Shukla, O. P. Singh, G. R. Mishra, Raj K. Tiwari · 2013
Nowadays reversible circuit designing is the emerging area of research. This design strategy aims towards the formation of digital circuits with ideally zero power dissipation. In this paper we have proposed a new reversible logic module to design a 4-bit binary 2s complement circuit. This complement circuit using reversible logic can be used to design other low loss Arithmetic circuit. Proposed circuits have been simulated using ModelSim and implemented using Xilinx Spartan2 FPGA platform. General Terms 2s complement calculator. Keywordslogic circuit, Reversible gates. gates. These designs are optimized on the basis of the total number of reversible gates used in the design, total number of garbage outputs and macro statistics etc. Later we have proposed a highly optimized circuit for 2complement calculator using a single SSMT gate. SSMT gate is introduced in this paper. This gate can be used for the designing of various arithmetic and logical applications, but in this paper its application is limited to 2s complement calculator only. The paper is organized in nine sections. First section gives the introduction of the proposed 2s complement calculator circuit using the reversible logic concept. Section two gives the brief introduction of the fundamental concepts of reversible logic. Next section introduces the proposed reversible gate i.e. SSMT gate. After that in section four conventional 2s complement calculator for 4-bit binary numbers is discussed. In section five designing of 4-bit 2s complement calculator circuit using reversible gates have been performed. Result and analysis of the proposed designs have been given in section six. Sections seven, eight and nine give the conclusion, acknowledgement and references of the paper respectively. 2. FUNDAMENTALS OF REVERSIBLE