An Implementation Framework for Run-time Reconfigurable Systems.
Michael Eisenring, Marco Platzner · 2000
We present an implementation framework for run-time reconfigurable systems. The framework provides a methodology and a design representation which allow to plug in different design tools. Frontend tools cover design capture, temporal partitioning and scheduling; back-end tools provide reconfiguration control, communication channel generation, estimation, and the final code composition. This paper discusses two of the framework's main issues, the design representation and the hierarchical reconfiguration approach for multi-FPGA systems. Keywords: multi-FPGA systems, hierarchical runtime reconfiguration, communication channel synthesis 1 Introduction During the last years run-time reconfiguration of hardware has gained interest as implementation approach for embedded systems [1] [2]. Run-time reconfigurable systems split a larger problem into temporally exclusive collections, so-called configurations, of smaller subproblems that are loaded onto FPGAs dynamically during the application'...