NocMaker: A cross-platform open-source design space exploration tool for networks on chip
David Castells‐Rufas, Joven, Jaume, Sergi Risueno, Fernandez-Alonso, Eduard, Jordi Carrabina · Zenodo (CERN European Organization for Nuclear Research) · 2009
Networks on chip have been proposed to overcome the limitations of bus-based systems in complex Systems on Chip like many-core processors. NoCs are superior in terms of performance, energy efficiency, and scalability while boosting design productivity by reusing large silicon blocks like processors, and network elements. Network design tools should be able to create networks with different design space parameters and determine their system metrics but they should also validate them, identifying design errors and system bottlenecks. Given some system requirements, the tools should help in changing the values of different design space parameters and determine the obtained results. This process is what we know as design space exploration. The need for such tools is identified as challenge 3.5 in the HIPEAC roadmap. This work presents the tool NocMaker, which is used for NoC design space exploration, NoC generation, and system validation. NocMaker is available at http://cephis.uab.es/proj/public/nocmaker/index.xhtml as Open Source under Apache2 license.