Matrix and vector multiplications using a 2½-dimensional systolic array
Stephen P. S. Lam · Electronics Letters · 1990
A pseudo-three-dimensional network, called a 2½-dimensional systolic array, to compute matrix-vector and matrix-matrix multiplications is introduced. The new architecture achieves twice the throughput rate as that of the conventional systolic arrays with the same number of processing elements. This new approach provides a practical means for the implemention using current integration technology.