A Novel IP Lookup Scheme and VHDL Implementation for Fast Gigabit IP Routers
Seung Min Gang, Jae Won Song · 2000
This study presents proposal and a VHDL implementation of a fast unicast route-lookup algorithm that be implemented by a hardware. The forwarding table is small enough to fit into a faster SRAM with low cost by the proposed scheme. For example, a large routing table with 40,000 routing entries obtained by IPMA website can be compacted into a forwarding table of 300~400KB with low cost. Most route lookups need only two memory access no lookup needs more than three memory accesses. When we implemented by VHDL based on ALTERA EPM7192 device and a 100MHz clock under condition of one memory access with 10ns SRAM, this system needs 27ns memory access time and furnishes approximately $50{\times}10^6$ routing lookups/s. The beyond 95% lookups of incoming IP needs only the two memory access and interface processing time is below 83ns.