A Synchronous Data Compression System
Joseph Calcagno · RIT Scholar Works (Rochester Institute of Technology) · 1979
This thesis discusses in detail the steps required for the design of a general purpose Data Acquisition System (D.A.S.). This D.A.S. is called a Synchronous Data Compression System (S.D.C.S.) because of some special features. The S.D.C.S. is designed to accept data in analog or digital form. A simple control panel interface is developed, and areas of prime interest such as input/output interface control, analog-to-digital conversion, data compression, and data sampling modes are discussed in detail. ? The primary logic type used for the S.D.C.S. is the CMOS type 4000 Series which was developed by R.C. A.