Efficient Shift Registers, LFSR Counters, and Long Pseudo- Random Sequence Generators
Xilinx Family · 1996
Summary Shift registers longer than eight bits can be implemented most efficiently in XC4000E Select-RAM TM. Using Linear Feedback Shift-Register (LFSR) counters to address the RAM makes the design even simpler. This application note describes 4- and 5-bit universal LFSR counters, very efficient RAM-based 32-bit and 100-bit shift registers, and pseudo-random sequence generators with repetition rates of thousands and even trillions of years, useful for testing and encryption purposes. The appropriate taps for maximum-length LFSR counters of up to 168 bits are listed.