Reconfigurable Noise‐Spectroscopy Physical Unclonable Function in Floating‐Body Charge‐Trap‐Flash Transistors
Jaehong Min, H. G. Kang, Jaehong Park, Youngchan Cho, Minwook Kang, Jueun Lee, Sangwan Kim, David Radermacher, Saeroonter Oh, Joon‐Kyu Han, Wonjun Shin · Advanced Functional Materials · 2026
ABSTRACT Resource‐constrained edge and Internet‐of‐Things devices require hardware roots of trust that are compact, reconfigurable and compatible with large‐scale manufacturing. However, many physical unclonable functions (PUFs) rely on fixed post‐fabrication variability, limiting their adaptability once challenge–response information is exposed. Here we report a reconfigurable noise‐spectroscopy PUF (NS‐PUF) implemented in a floating‐body charge‐trap‐flash (FB‐CTF) transistor that builds on technologically mature silicon transistor. In this device, low‐frequency noise (LFN) acts as a spectrally amplified entropy source: minute process‐induced variations in defects, electrostatics and body relaxation are transformed into multidimensional power spectral density fingerprints rather than a single scalar electrical shift. The CTF gate stack provides a nonvolatile internal state that remaps these spectral fingerprints under the same external read condition. This co‐integrated architecture supports two security modes: (1) Multiple cells can generate conventional bitmap‐type PUF responses through relative PSD ordering, while (2) a single addressed transistor, or a small number of devices, can be authenticated directly by matching enrolled PSD phenotypes for dynamic PUF verification. Thus, authentication can be scaled not only by increasing array size or bit‐string length, but also by exploiting the spectral depth of individual reconfigurable transistors. The proposed reconfigurable NS‐PUF demonstrates that LFN, once treated as an undesirable noise source, and mature charge‐trap memory functionality can be repurposed within commercially established transistor technologies as adaptive security primitives, providing a scalable route toward reconfigurable PUFs for future edge and IoT systems.