Arithmetic Annealing: Algorithmic Yield Recovery for Defective Quantum Hardware
Pirolo Andrés Sebastián · Zenodo (CERN European Organization for Nuclear Research) · 2026
Abstract Quantum hardware manufacturing faces a critical yield crisis, with 30–50% of fabricated chips containing defective qubits or couplers that render them commercially unusable. Current industry-standard transpilers (e.g., IBM SABRE) assume functional topologies and experience complete deadlock when mapping logical circuits onto these defective graphs, resulting in billions of dollars in wasted silicon. This paper introduces Arithmetic Annealing, a novel optimization framework that recovers defective quantum hardware through number-theoretic scheduling. Unlike classical simulated annealing with exponential cooling, our method employs a Collatz-derived schedule (The Lázaro Protocol) that alternates between crystallization (n/2, even phase) and chaotic expansion (3n+1, odd phase). This "controlled instability" allows the optimizer to vault over the infinite energy barriers created by hardware defects. Key Results on IBM Heavy Hex Topology (12.5% Defect Rate): 100% Recovery Rate: 4/4 benchmark circuits successfully transpiled. vs. Industry Standard: IBM SABRE failed completely (0% recovery, total deadlock). Performance: QAOA-14 compiled with only +26% gate overhead. Economic Impact: Potential to recover ~$40M in annual revenue per manufacturing facility by resurrecting "dead" chips. This work establishes Arithmetic Annealing not merely as an optimization technique, but as essential industrial yield recovery infrastructure for the quantum supply chain. STATEMENT OF PRIOR ART AND LICENSE TERMS Aligned with PolyForm Noncommercial License 1.0.0 Author: Andres Sebastian Pirolo ORCID: 0009-0004-3899-1222 Email: [email protected] Date: March 4, 2026 ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━ 1. 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