Parallel Processing — the picoChip way!
Gerald H. Hilderink, A.W.G. Duller, Gajinder Panesar, Daniel Towner · 2003
This paper describes a new approach to parallel processing within the well targetted application domain of wireless communications systems, using the picoArrayTM. The picoArrayTM is a tiled-processor architecture, containing 430 heterogeneous processors, connected through a novel, compile-time scheduled interconnect. We show how the features of the picoArrayTM allow deterministic processing to be achieved, and how the tool chain allows programming to be performed effectively in a combination of high level assembly language and C. By handling a wide variety of types of processing within the picoArrayTM a single design flow can be used to produce complex communications systems. The effectiveness of this approach is demonstrated through the use of the picoArrayTM to build a working 3G base-station.