Embedded cryptographic hardware : design & security
Nadia Nedjah, Luiza de Macedo Mourelle · Nova Science Publishers eBooks · 2005
Compact and Efficient Encryption/Decryption Module for FPGA Implementation of AES PAX: A Datapath-Scalable Minimalist Cryptographic Processor For Mobile Devices Architectural Design Features of a Programmable High Throughput AES Coprocessor Power-Analysis Attack on an ASIC AES Implementation On the Importance of Protecting c in SFLASH against Side Channel Attacks Resistance Against Power and Timing Attacks: An Evaluation of Two Clock-less Implementations of the AES Modular Multiplication: Methods and Hardware A Design of Basis-Independent Bit-Parallel Multipliers Reducing the Complexity of Modular Multiplication by Modification of One Operand Special Hyperelliptic Curve Cryptosystems of Genus Two: Efficient Arithmetic and Fast Implementation A Generic Coprocessor For Elliptic Curve Scalar Multiplication on Hardware Hyperelliptic Curve Cryptosystem: What is the Best Parallel Hardware Architecture? Permutation Operations in Block Ciphers Streaming Encryption for a Secure Wavelength and Time Domain Hopped Optical Network Bibliography Index.