ACCELERATING SORTING WITH RECONFIGURABLE HARDWARE
Ney Laert Vilar Calazans, Fernando Moraes, Katherine B. Quintans, Felipe B. Neuwald · 2000
This paper is dedicated to explore the acceleration of sorting algorithms with reconfigurable hardware. We present the rationale for solving the sorting problem in hardware, and suggest ways to ease the use of sorting hardware in the real world of applications programming. One of the ongoing work main goals is the migration of the quicksort algorithm to hardware. The algorithm and its mapping to hardware are discussed.