A guide to RISC microprocessors
Michael D. Slater · Academic Press Professional, Inc. eBooks · 1992
Part 1 Perspective: RISC architectures, M. Slater instruction set design, B. Case design issues for next-generation processors, B. Case SPARC architecture, B. Case cypress SPARC chips, M. Slater SPARC support, M. Slater redesigned cypress SPARC chips, M. Slater first ECL microprocessor, M. Slater LSI logic embedded control SPARC processor, M. Slater fujitsu embedded SPARC processor, M. Slater. Part 2 MIPS: MIPS processor, M. Slater MIPS R3000 system design, M. Slater IDT R3000 derivative, M. Slater MIPS chip set with full ECL CPU implementation, M. Slater ECL bus controller, M. Thorson IDT embedded MIPS processors, M. Slater high integration on MIPS based processor, M. Slater MIPS with 64-Bit R4000 architecture. Part 3 Motorola 88000: motorola 88000 RISC chip set, M. Slater Motorola 88200, M. Slater. Part 5 Intel 960: intel register scoreboarding, J.H. Wharton intel 960 architecture, J.H. Wharton intel i860 performance, B. Case intel i860 parallel processing support, M. Slater MASS860, B. Case and M. Slater. Part 6 AMD 29000: AMD 29000 architecture, B. Case AMD 29000 bus structure, B. Case and T. Olson AMD 29050, B. Case PA-RISC, B. Case PA workstations, M. Slater.