Verilog digital system design : RT Level Synthesis, Testbench and Verification
Zainalabedin Navabi · McGraw-Hill eBooks · 2006
Chapter 1: Design Automation with Verilog Chapter 2: Register Transfer Level Design with Verilog Chapter 3: Verilog Language Concepts Chapter 4: Combinational Circuit Description Chapter 5: Sequential Circuit Description Chapter 6: Component Test and Verification Chapter 7: Detailed Modeling Chapter 8: RT Level Design and Test Appendix A: List of Keywords Appendix B: Frequently Used Sysytem Tasks and Functions Appendix C: Compiler Directives Appendix D: Verilog Formal Syntax Definition Appendix E: Verilog Assertion Monitors