Lightweight FPGA Classifiers using Tangled Program Graphs
Jarlath Warner, John J. McAllister, Karol Desnos · 2025
As hosts to accelerators for Artificial Intelligence (AI), FPGA have shown great potential, supported by a burgeoning suite of accelerator synthesis tools. However, these tools currently target Deep Neural Networks (DNNs), which are known to be non-ideal for certain kinds of systems. Alternatives exist, such as Tangled Program Graphs (TPG), which are capable of adapting to the complexity of tasks including those where DNNs struggle. Even though TPGs have shown success on conventional sequential processing hardware, their synthesis onto FPGA remains unexplored. Therefore, we propose a new synthesis toolkit for automatically generating lightweight TPG classifiers which reformulate the TPG execution paradigm to enable streaming data and high levels of parallelism. When applied to practical classification problems including ECG arrhythmia classification and network intrusion detection, we enable classifiers which are $16.9 \%$ more accurate, incur substantially lower resource costs and experience increased throughputs as high as $79.58 \%$ in comparison to DNN implementations created using alternative synthesis toolkits. This realises an effective alternative to DNNs for deriving lightweight FPGA classifiers which are more accurate, cost less and deliver orders of magnitudes greater performance than current DNN-based alternatives.