Power Side-Channel Leakage Assessment of Fpga-Based Spiking Neural Networks
Veeramani Pugazhenthi, Muhtasim Alam Chowdhury, Sujan Ghimire, Harish Kumar Dharavath, Banafsheh Saber Latibari, Soheil Salehi · 2025
On-chip learning refers to the process of training or updating machine learning models directly on specialized hardware, rather than relying on external computational resources such as CPUs or GPUs. On-chip learning offers reduced latency, energy efficiency, privacy, and adaptability. Hence, onchip learning is a promising approach for enabling intelligent decision-making and adaptability in edge and IoT devices while addressing the challenges posed by limited resources and data privacy concerns. One of the main features of on-chip learning involves adapting synaptic weights within a Spiking Neural Network (SNN), allowing dynamic adjustments of the network's behavior to align with desired outcomes. Such adaptability is a double-edged sword, as it opens doors for potential security vulnerabilities. Unaddressed security risks in on-chip learning could lead to a wide range of threats, including data leaks, unauthorized access, and even adversarial manipulation of the learning process. In this work, we demonstrate a successful power side-channel attack (SCA) targeting a quantized SNN deployed on the CW305 FPGA using ChipWhisperer. Our analysis reveals consistent power leakage patterns correlated with neuron updates, enabling attackers to infer internal model attributes without accessing model weights or inputs. Furthermore, this manuscript will outline safeguards and mitigation strategies to address these security concerns.