FPGA Based Design and Implementation of a Reliable Electronic Voting System
Padmaja C, Tushar Kumar · International Journal of Novel Research and Development · 2025
Polling using Electronic Voting Machines (EVMs) provides a more efficient, safe, and secure method, significantly reducing the time required compared to traditional methods. The proposed digital EVM, designed using Xilinx ISE with Verilog HDL, further enhances these benefits and can be implemented on an FPGA board for real-time application. This advanced EVM design involves multiple stages: initially, determining the total number of voters and contestants; then, enabling voting through an active high input signal for each voter, allowing them to cast their vote securely via a voter switch input. The design process includes creating a flowchart, developing algorithms, and writing code to implement and simulate the logic, ensuring a streamlined and reliable election process. In stage two, voting process begins when the voter casts his vote to a particular party or contestants the polled vote is registered in the individual contestant registry. In stage three after completion of voting process the votes are validated by comparing the votes polled to the contestants in their registries after which the election process ends by declaring the winner. The above proposed method can be implemented on FPGA board for real time applications ranging from university level elections to Assembly and Loksabha elections, as it has the advantage that it can be reprogrammed over and over for various tasks according to their requirement which helps in reducing the expenditure.