Portable, Scalable, and Hierarchical Modeling-and-Simulation Workflow Parallelization
Joshua M. B. Smith, Shuangshuang Jin · IEEE Access · 2025
This work seeks to improve virtual prototyping speed through high-performance computing enabled scalable interfaces, concurrent execution, synchronized communication, and multi-level parallelization. Causal adapters prepare acausal conserving ports for co-simulation thereby enabling a discrete-coupling approach that relinquishes the demand to solve the complex system monolithically. Established tools are integrated to form a modular hierarchy whereby each technology is associated with a layer and each layer suppresses the implementation details of the level below. A Simulink based series-hybrid electric vehicle (SHEV) was divided into two subsystems via causal adapters, exported to Functional Mock-up Unit (FMU), co-simulated via a Hierarchical Engine for Large-Scale Infrastructure Co-Simulation (HELICS) federation, and scaled concurrently via a Snakemake workflow. Sequential execution time of the proposed model framework increases 23.6x at worst driven by inefficiencies within FMPy (4x), hardware resource variety (0.7-2.4x), and communication overhead required by HELICS (1.5-2x). The standalone FMU removes licensing constraints. The proposed framework supports parallel execution, with scalability constrained solely by the available computational resources. This surpasses the drawbacks of slower sequential execution. Despite sequential execution time degradation, 81 Monte Carlo samples executed in parallel on lower-performance hardware finish 3.4x faster with 8.5x speedup plausible on higher-performance hardware. This speedup scales in proportion to the number of samples. This framework design facilitates reproducibility, reuse, extensibility, scalability, and systematic experimentation in support of rapid virtual prototyping and, by extension, digital twins.