PoCo: Extending Task-Parallel HLS Programming with Shared Multi- P r o ducer Multi- Co nsumer Buffer Support
Akhil Raj Baranwal, Zhenman Fang · ACM Transactions on Reconfigurable Technology and Systems · 2025
Advancements in High-Level Synthesis (HLS) tools have enabled task-level parallelism on FPGAs. However, prevailing frameworks predominantly employ Single-Producer-Single-Consumer (SPSC) models for task communication, thus limiting application scenarios. Analysis of designs becomes non-trivial with an increasing number of tasks in task-parallel systems. Adding features to existing designs often requires re-profiling of several task interfaces, redesign of the overall inter-task connectivity, and describing a new floorplan. This article proposes PoCo, a novel framework to design scalable Multi-Producer-Multi-Consumer (MPMC) models on task-parallel systems. PoCo introduces a shared-buffer abstraction that facilitates dynamic and high-bandwidth access to share on-chip memory resources, incorporates latency-insensitive communication, and implements placement-aware design strategies to mitigate routing congestion. The frontend provides convenient APIs to access the buffer memory, while the backend features an optimized and pipelined datapath. Empirical evaluations demonstrate that PoCo achieves up to 50% reduction in on-chip memory utilization on SPSC models without performance degradation. Additionally, three case studies on distinct real-world applications reveal up to 1.5 \(\times\) frequency improvements and simplified dataflow management in heterogeneous FPGA accelerator designs.