Implementation of Reconfigurable FIR Filter Using Dadda Multiplier

S Akshara, Akella Madhav, K. R. Sreelekha · 2025

Reconfigurable filtering is crucial in modern signal processing applications that require real-time adaptation to varying bandwidth demands. This paper proposes an efficient and reconfigurable finite impulse response (FIR) filter architecture based on the Farrow structure, a well-established method for enabling reconfigurability. The novelty of this work lies in the integration of the Farrow-based reconfigurable filter with a Dadda multiplier to enhance speed and reduce hardware complexity. The proposed architecture supports dynamic bandwidth control through smooth polynomial coefficient interpolation, eliminating the need for repeated redesign. Integration of Dadda multipliers results in reduced latency and improved computational efficiency. This approach offers a high-speed, reconfigurable solution wellsuited for real-time bandwidth-adaptive applications. Functional verification using QuestaSim confirms the design's effectiveness, demonstrating accurate filtering performance and reduced dynamic power consumption.

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