FEditor: Consecutive Task Placement With Adjustable Shapes Using FPGA State Frames
Yanyan Li, Yu Chen, Zhiqian Xu, Yawen Wang, Hai Jiang, Keqin Li · IEEE Transactions on Parallel and Distributed Systems · 2025
Field Programmable Gate Arrays (FPGAs) are widely adopted in datacenters, where each FPGA is exclusively assigned to a task. This strategy results in significant resource waste and increased task rejections. To address this issue, placement algorithms adjust the locations and shapes of tasks based on Dynamic Partial Reconfiguration, which partitions an FPGA into multiple rectangular areas for sharing. However, existing schemes are designed for static task sets without adjustable shapes, incapable of optimizing the placement problem in datacenters. In this paper, FEditor is proposed as the first consecutive task placement scheme with adjustable shapes. It expands the planar FPGA models into three-dimensional ones with timestamps to accommodate consecutive tasks. To reduce the complexity of three-dimensional resource management,State Frames(SFs) are designed to compress the models losslessly. Three metrics and a nested heuristic algorithm are used for task placement. Experimental results demonstrate that FEditor has improved resource utilization by at least$19.8\%$and acceptance rate by at least$10\%$compared to the referenced algorithms.SFsand the nested algorithm accelerate the task placement by up to$10.26\times$. The suitability of FEditor in datacenter environments is verified by its time efficiency trends.