High-Energy-Efficiency Dynamically Reconfigurable Processor for IoT Applications
Lexuan Zhang, Huimin Du, Libo Chang, Jiayu Zhang, Xu Tang · 2025
With the widespread adoption of artificial intelligence at the edge of the Internet of Things (IoT), embedded devices are increasingly limited by computational resources and power constraints. Improving energy efficiency while ensuring real-time inference performance has thus emerged as a key challenge. This paper proposes a heterogeneous architecture based on a general-purpose RISC-V core coupled with dynamically reconfigurable computing units. Leveraging a CSRbased task dispatch mechanism, the proposed solution avoids compiler complexity associated with custom instructions. By augmenting the CSR with a pre-configuration region, the architecture enables preloading configurations for subsequent tasks upon the initiation of current ones. Combined with a CV32RT and CLIC shadow-register fast-interrupt scheme, this significantly reduces task-switching latency. Additionally, we design a neural-network-aware task-offloading and cross-layer dynamic frequency-scheduling algorithm that dynamically adjusts the accelerator frequency according to computational intensity per network layer, thereby maximizing energy efficiency under latency constraints. Experiments on a ZCU104 FPGA platform demonstrate a peak performance of 216 GOPS at approximately 2.13 W power consumption, achieving an energy efficiency of $\mathbf{1 0 1. 4}$ GOPS/W. These results validate the high suitability and energy-efficiency advantages of our approach in IoT scenarios.