Expanding and Obfuscating In-Cone Trees to Resist SAT Attack in Logic Locking

RuiJie Wang, Li-Nung Hsu, Yung‐Chih Chen, TingTing Hwang · IEEE Transactions on Reliability · 2025

Hardware security is crucial to protect the confidentiality and integrity of circuit designs. One of the techniques used for this purpose is logic locking, which safeguards against piracy, overuse, and reverse engineering. Logic locking protects a circuit by introducing extra key gates to obfuscate the circuit’s functionality such that the circuit operates the correct function only when the correct key is applied. Recently, researchers have found that obfuscating a point function, such as anand-tree, within a circuit can effectively resist the powerful SAT-based attack method. Although the obfuscation techniques are effective in securing circuit designs, they may suffer from two issues: First, the tree size in the circuit may not be sufficient to achieve the desired level of security, making the locked circuit vulnerable to SAT attack. Second, the obfuscation can be defeated in a single iteration if the SAT solver finds a specific input, referred to as the remove-all distinguishing input pattern (DIP). In this article, we address the two issues. A split-compensate operation is proposed to expand an obfuscated tree. Moreover, by selecting internal variables using a fault-based method, our method mitigates the remove-all DIP issue, and thereby increase the average-case SAT iteration count. The experimental evaluation confirms that the proposed methods are effective in defending against SAT attacks on benchmarks from MCNC, ISCAS’85, EPFL, and ITC’99. In addition, SAT attack fails to break the majority of the benchmarks within a 48 h runtime. Furthermore, our method can defend against removal attack, SPI attack, and Valkyrie attack as well.

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