On-Chip Femtofarad Capacitance Standard Based on Interdigital Structure
Shuo Zhao, Zixuan Ran, Yan Rong Yang, Jian Chen, Yinglong Huang · IEEE Transactions on Instrumentation and Measurement · 2025
In semiconductor testing, capacitance is a crucial parameter that plays a vital role in ensuring the functionality, reliability, and safety of electronic products. As the size of nanodevices in integrated circuits continues to decrease, the need for highly sensitive capacitance measurements in the femtofarad (fF) range has become crucial for various applications, it is necessary to develop an on-chip capacitance standard in the fF range. In this paper, on-chip capacitance standard units ranging from 10 fF to 1 pF are designed and fabricated, guided by theoretical calculations and simulation analysis. The capacitor uses an interdigital structure to achieve precise linear changes in capacitance through the incremental capacitance method. The absolute value of the deviation from the typical value of the capacitance standard units is less than 5%. The capacitance standard units fabricated on a Fused Silica Wafer exhibit a capacitance variation of less than 0.1% within the test frequency range of 1 kHz to 20 kHz. The long-term stability (over a period of 9 months) of the on-chip capacitance standard changes by less than 0.1%×C+50 aF (whereCis the nominal value of capacitor). In the range of 10 fF to 1 pF measured at 1 kHz, the uncertainty of the capacitance standard unit is less than 0.5%×C+100 aF (whereCis the nominal value of capacitor,k=2).