Design and Analysis of an Energy-Efficient Full Adder Using Reversible Charge Recovery Logic

Vivek Jain, Asif Moiz, Anitha Anumula, Anusha Chennam, Archana Mallela · 2025

Power efficient and high-performance digital circuits are increasingly important digital circuits are increasingly important Processor perform Complex arithmetic and logic operations, including the use of adders, which are necessary for daily tasks. A complete adder with adiabatic logic lowers heat dissipation and energy loss. This logic allows for faster and more efficient circuit operation. The proposed adiabatic features a new architecture, two output bits for sum and carry, and an adiabatic charging mechanism. Adiabatic logic reduces power consumption for complete adder circuit.

Read the paper · More papers on PaperTik