SiDTBF: Merging Soft Information With Dynamic Threshold Bit Flipping LDPC Decoding for 3-D NAND flash memory
Yangyi Li, Meng Zhang, Wei Li, Tianwei Gui, Changsheng M. Xie, Fei Wu · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2025
Through stacking and multi-bit technology, three-dimensional (3D) flash memory enhances storage capacity and density; nevertheless, the reduction in noise margin results in an increase in raw bit error rate (RBER) and a decrease in data reliability. Low-density parity-check (LDPC) codes are widely used in flash memory for improving data reliability because of its strong error correction capability. In the early stages of 3D flash memory use, the RBER is low, and hard decision decoding (e.g., bit flipping decoding) is generally invoked for error correction. Existing LDPC codes with dynamic threshold bit flipping (DTBF) decoding algorithms cannot correct bit errors when the gradually increasing RBER exceeds its error correction threshold, resulting in an increase in decoding latency. To enhance error correction capability and reduce decoding latency, this paper proposes SiDTBF: merging soft information with DTBF LDPC decoding for 3D NAND flash memory. First, the read reference voltage of various interval lengths is applied in accordance with the threshold voltage distribution drift characteristics of the 3D flash memory cell to get the decoding soft information of each bit. Second, the strong and weak bits are distinguished using the soft information. In contrast to weak bits, which are more likely to be erroneous, strong bits are more likely to be correct. Finally, all the strong and weak bits are input as initial values for bit-flip iterative decoding. Using the column weight of the parity-check matrix, the threshold for the number of flipped weak bits is determined in the first decoding iteration process. The portion of the weak bits that exceeds the threshold is flipped. In the ensuing iteration phase, the DTBF decoding algorithm is used. SiDTBF improves decoding error correction performance by fusing each bit’s soft information with the DTBF algorithm during the decoding phase. Simulation results show that compared with current DTBF, SiDTBF significantly improves bit flipping decoding error correction capability and reduces decoding latency.