Comparative Analysis of Timing Parameters in Reconfigurable Devices
Aksa David, Manjith Baby Chellam · 2025
This paper presents a comprehensive analysis of hardware security, focusing on the vulnerabilities of field-programmable gate arrays (FPGAs) and the challenges posed by counterfeit and spurious chips. This study examines the potential threats posed by untrustworthy third parties in the design flow, and discusses the implementation of logic locking as a key technique in hardware security. In addition, the power and timing parameters from the xc7a35tcpg236-1 (Basys 3), xc7s100fgga676-2 (Spartan 7 Boolean Board), and Zynq ultra-scale mpsoc zcu104 were compared. The proposed methodology involves evaluating the performance of FPGAs using an int2float benchmark circuit on three devices. Moreover, this work also addresses emerging threats and the need for efficient FPGA devices to enhance security and performance. Furthermore, this paper highlights the importance of ensuring the authenticity of integrated chips in national security systems and emphasizes the significance of maintaining the integrity and security of the supply chain when dealing with critical or safety-critical systems.