FPGA Implementation of Parallel Non-Integer Oversampling Timing Recovery with IQ Skew Compensation
Benyao Zou, Wei Wang, Kaiyang Dong, Fan Li · 2025
A real-time timing recovery algorithm working under non-integer oversampling is proposed to reduce analog-to-digital converter (ADC) oversampling, which can obtain 2-dB optical signal-tonoise ratio (OSNR) gain from IQ skew compensation simultaneously.