Behavioral Modeling of Analog Neural Networks Inference Circuits
Yasmine Abu-Haeyeh, Sascha Schmalhofer, Lars Hedrich · 2025
Analog neural networks provide an energy- and area-efficient hardware solution for a wide range of edge AI applications. However, verification of such analog-based neural networks suffers from high simulation and debugging costs when simulated at the transistor level. This paper proposes an automated behavioral modeling approach for analog inference circuits. We utilize a nonlinear model order reduction technique to abstract a single neuron netlist which is the building block of large analog neural networks. Then we generate a precise Verilog-A behavioral model that maintains the neuron circuit’s essential nonlinear static and dynamic behavior. Finally, we automatically reconstruct the neural network using a modular set combining thousands of these behavioral models, allowing for debugging the basic functionality and judging the network’s speed. Our experimental results show an average speedup of 234 when simulating the generated network compared to the transistor-level netlist on three examples including MNIST.