Dial: An Energy-Efficient Dram in-Memory Computing Accelerator with Compact Partial Product Lut and Twisted Differential Adc
Soyeon Um, Sangwoo Ha, Sunjoo Whang, Min‐Sung Kim, Byeongcheol Kim, Sang-Jin Kim, Junha Ryu, Chaeyun Jeong, Kyomin Sohn, Hoi‐Jun Yoo · 2025
This paper presents DIAL, an energy-efficient DRAM inmemory computing accelerator with partial product LUTbased architecture for advanced tasks. The compact LUT reduces 53% of the LUT area and 45% of power by eliminating extended zeros. The twisted differential ADC reduces ADC area by 37 % and power by 45 % through comparators sharing and improves CSNR by using a 2.3fF computation capacitor and increasing ADC resolution by$3 \times$. The dual-mode sense amplifier reduces 33% of LUT power by adjusting operation modes based on data patterns. Fabricated in 28 nm CMOS technology, DIAL occupies a$20.25 \text{mm}^{2}$die area and achieves 55.4 TFLOPS/W energy efficiency on the GPT-2 benchmark, demonstrating a$4.1 \times$higher efficiency than prior IMC designs.