Self-Destructible 3-nm Pre-Amplifier Physical Unclonable Function With “Zero” Bit Error Rate
Eric Hunt-Schroeder, Amit Degada, Tian Xia · IEEE Transactions on Circuits and Systems I Regular Papers · 2025
This article presents a Pre-Amplifier Physical Unclonable Function (PUF) fabricated in a 3-nm CMOS technology. The design achieves a “zero” Bit Error Rate (BER,$\lt 8.17\times 10^{-9}$) derived from the worst-case combination of enrollment (low voltage, low temperature) and key reconstruction (high voltage, high temperature) conditions. The design accommodates VDD voltages ranging from 650 mV to 950 mV and temperatures from$- 40~^{\circ }$C to$125~^{\circ }$C, meeting the requirements for most commercial applications in the technology sector. The BER reduction is achieved using a novel hybrid voting scheme. This scheme incorporates conservative unanimous voting during the stable bit identification (enrollment) and temporal majority voting during key reconstruction. Additionally, a gain enhancement stage using NFET cross-coupled devices is employed to maximize signal margins during reads. The design passes NIST SP800-90B and SP800-22 randomness tests while achieving 49.83% inter-chip hamming distance and 49.95% average hamming weight. The PUF can be reconfigured into a multi-stage self-destruction mode of operation in response to tamper events. The design combines electromigration (EM) and Time-Dependent Dielectric Breakdown (TDDB) to intentionally target the damage directly to the PUF data array containing stable (repeatable) bitcells. The result is an irreversible corruption of PUF encryption key to restrict all future authentication attempts.