Design and Implementation of Reconfigurable Approximate Adder in Real Time for Image Watermarking
Alidena Bhargavi, Darla Sahithya, I. Venu Madhav, Anchakanti Naveen Kumar, Avireni Srinivasulu, Sarada Musala, Bhargav Appasani, Cristian Ravariu · 2025
Millions of transistors are being embedded on single chip using VLSI, because of this the space between transistors has been decreased to a greater extent and is leading to chip faults or system faults. To avoid inaccurate results, faulttolerant systems are required. An adder is a fundamental circuit to perform computations in digital Very Large Scale Integration (VLSI) design. The design metrics of an adder can be improved using approximate adder, such approximate adder has been proposed named Reconfigurable Approximate Adder (RAA). Approximate adders are widely used in error-resilient applications such as multimedia, machine learning, and signal processing, where absolute precision is not critical. In this paper, we proposed the design of a new approximate adder that can address both accurate and approximate carry. The proposed reconfigurable approximate adder circuit produces without error when$P_{G}=0$and with two errors when$P_{G}=1$in the Carry output, offering a versatile solution for low-power, high-efficiency computing systems. The thus designed reconfigurable approximate adder design metrics are tested for image watermarking using MATLAB and Cadence Virtuoso Software.