A 3-bit/Unit Time-Domain Compute-In-Memory Macro With Adjustable Unit Delay
Xie He, Dongxu Li · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2025
With the increasing demand for high-energy efficiency in multiply-accumulate (MAC) operations within deep learning accelerators, computing-in-memory (CIM) has gained significant attention. Time-domain (TD) CIM eliminates the need for analog-to-digital converters (ADCs), but single-bit delay units suffer from low computational efficiency. To address these issues, this work presents a TD multibit-per-unit CIM macro that leverages a precision-configurable time-to-digital converter (TDC) to enable accuracy configurability. Experimental results show that the proposed design achieves a 3-bit delay unit as a multibit CIM unit and an overall of 3-byte weight precision and 8-bit input precision. Compared to using three 1-bit/unit CIM delay units with an adder, it achieves a linearity with linear offset less than 3%. Besides, bias voltage adjusts the frequency and precision of the circuit (from 600 to 900 mV), enabling a minimum delay step of 0.11 ns. This system achieves a maximum energy efficiency of 268 TOPS/W under different VDD, making it a promising solution for always-on edge AI applications.