Assessing the Capabilities of Large Language Models to Comprehend Analog Integrated Circuits via Netlist Analysis
Andrei Dăescu, Alexandru Guzu, Georgian Nicolae, Claudius Dan · 2025
Exploring the capabilities of large language models (LLMs) in specialized technical fields like analog circuit design remains an open research question. In this study, we assess five state-of-the-art LLMs for their ability to semantically parse SPICE netlists and identify functional sub-topologies, such as differential pairs, current mirrors, and inverter stages. We present an evaluation framework inspired by program synthesis metrics, using a curated dataset of comparator circuits annotated with expert-defined functional blocks. Our experiments reveal that while current LLMs can reliably detect simple structures, their performance declines with more complex circuits that involve hierarchical organization and role differentiation. DeepSeek-R1 achieved the highest accuracy across all comparators, with GPT-4.5 and Llama also showing competitive performance. Meanwhile, GPT-4o faced challenges in maintaining consistent functional decomposition. These findings underscore both the emerging strengths and critical limitations of LLMs in under-standing analog hardware and suggest pathways for enhancing their reasoning abilities through improved prompting, dataset augmentation, and hierarchical learning approaches.