Open-Source Hardware and Agile System-on-Chip Design
Luca P. Carloni · 2025
The design of next-generation system-on-chip (SoC) architectures is increasingly constrained by the complexity of the engineering process.Agile SoC design methodologies address this challenge by promoting modularity and raising the level of abstraction throughout the design flow.ESP is an open-source platform that embodies these principles, combining a scalable, tile-based architecture with a methodology that enables rapid prototyping and integration.Using ESP, a small team, composed primarily of graduate students, successfully designed a Linux-SMP-capable SoC in 12nm technology in just a few months.The chip integrates exclusively open-source components, including multiple RISC-V processors and 14 custom accelerators, and features novel distributed hardware power management and a flexible NoC-based orchestration of computation and communication.By uniting open-source hardware and agile design principles, ESP facilitates collaborative SoC research across institutions and accelerates workforce development in hardware design.