FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators
Victor Isachi, Alessandro Nadalini, Riccardo Fiorani Gallotta, Angelo Garofalo, Francesco Conti, Davide Rossi · 2025
The slow-down of technology scaling and the emergence of Artificial Intelligence (AI) workloads have led computer architects to increasingly exploit parallelization coupled with hardware acceleration to keep pushing the performance envelope.However, this solution comes with the challenge of synchronization of processing elements (PEs) in massive heterogeneous many-core platforms.To address this challenge, we propose FractalSync, a hardware accelerated synchronization mechanism for Bulk Synchronous Parallel (BSP) systems.We integrate FractalSync in MAGIA, a scalable tilebased AI accelerator, with each tile featuring a RISC-V-coupled matrix-multiplication (MatMul) accelerator, scratchpad memory (SPM), and a DMA connected to a global mesh Network-on-Chip (NoC).We study the scalability of the proposed barrier synchronization scheme on tile meshes ranging from 2×2 PEs to 16×16 PEs to evaluate its design boudaries.Compared to a synchronization scheme based on software atomic memory operations (AMOs), the proposed solution achieves up to 43× speedup on synchronization, introducing a negligible area overhead (< 0.01%).FractalSync closes timing at MAGIA's target 1GHz frequency.