Double-Word Decomposition in a Combined FP16, BF16 and FP32 Dot Product Add Operator
Orégane Desrentes, Benoît Dupont de Dinechin, Florent de Dinechin · 2025
This work presents a floating-point Fused Dot Prod-uct Add operator designed for two use cases: mixed-precision matrix multiply add for deep learning and single-precision arithmetic for numerical computing. We build on classic double- word techniques to emulate FP32 arithmetic as the unevalu-ated sum of lower-precision floating-point numbers. Specifically, we introduce E9S12, a 9-bit exponent, 12-bit significant, non- normalized floating-point format, to represent either the FP16 and BF16 multiplicands or the results of the FP32 multiplicand decomposition inside a Fused Dot Product Add operator. The re-sulting operator correctly rounds the FP16 products accumulated in FP32 and also matches the standard FP32 FMA arithmetic when the size-4 E9S12 dot product operates on decomposed FP32 multiplicands. We evaluated the implementation of this combined FP16, BF16 and FP32 Dot Product Add operator and compare it to correctly rounded Fused Dot Product Add operators by synthesis for a$4\text{nm}$technolgy node.