Development of an Embedded 2-Phase Cooling Solution for Two Stacked High-Power Chips in Future HPC HPC and AI Applications
Xiaowu Zhang, Huicheng Feng, Gongyue Tang, Boon Long Lau, Ming Chinq Jong, Surya Bhattacharya, Vempati Srinivasa Rao · 2025
There is increasing recognition that 3D IC promises tremendous performance advantage. However, thermal management technologies currently limit implementation. In this paper, we present the development of an embedded backside 2phase cooling technology that enables the dissipation of high power in two stacked chips, aimed at future HPC and AI applications. The test vehicle was designed and fabricated. Testing results show that chip- 1 can dissipate a heat flux of$157 \mathrm{W} / \text{cm}^{2}$and chip- 2 can dissipate a heat flux of$187 \mathrm{W} / \text{cm}^{2}$at coolant flow rate$0.699 \mathrm{L} / \min$. This is the first demonstration of an embedded 2phase cooling solution for two stacked high-power chips.