Hardware-Efficient Noise-Level Estimation for Image Denoising With FrWF and Polynomial Regression-Based Edge Detection
Anuja George, E. P. Jayakumar · IEEE Sensors Journal · 2025
Image noise estimation is vital in noise removal in biomedical imaging and computer vision applications. A precise calculation of the noise standard deviation is required for the image-denoising algorithms. An efficient noise estimation method is proposed using fractional wavelet filter (FrWF) and polynomial regression-based edge detection. The edge detection suggested in this study employs an adaptive edge threshold estimation based on polynomial regression and has lower hardware demands than the existing Sobel edge detection with Otsu thresholding. The suggested noise estimation technique performs competitively in terms of noise estimation accuracy when compared to earlier sophisticated algorithms. A very large scale integration (VLSI) architecture design for the suggested noise estimation technique is also provided. The proposed design is modeled in Verilog Hardware Description Language (HDL), simulated using Vivado 2019.1, and synthesized for TSMC 90 nm CMOS technology by Cadence Genus Synthesis Solution. The implementation of the proposed noise estimation algorithm demands an area of 210354.62 μm2, consumes 5.75 mW power, and has an operating frequency of 120 MHz. The suggested design is accurate and hardware-efficient which is the key highlight of this work.