NAND flash innovation in the AI Era
S. Krishnan, Shyam Surthi, Martin Popp, Richard J. W. Hill, F. Pellizzer, Paolo Tessariol, Yoshiaki Fukuzumi · 2025
As the world enters the Artificial Intelligence (AI) era NAND FLASH faces new market opportunities and scaling challenges. We present Microns G9 TLC NAND technology featuring class leading bandwidth enabled by 6 plane architecture and low latency. We describe block architecture innovation that enabled ~40% increase in array density to ~35 Gb/mm2 with only 19% increase in # of WLs. Beyond G9 we discuss potential scaling options including confined storage node, ferroelectric cell and wafer bonding to enable continued bit cost reduction and satisfy future AI workload demands.