An Asynchronous RISC-V-based SNN Processor with Custom ISA Extensions for Programmable On-Chip Learning
Xuanyu Zhang, Jilin Zhang, Haoyang Huang, Hong Chen · 2025
Spiking Neural Network (SNN) processors have garnered increasing attention because of their high energy efficiency. Besides, on-chip learning ability allows them to adapt to various environments. However, most existing SNN processors with on-chip learning are limited by fixed learning rules, restricting their applicability across diverse tasks. In this paper, we propose an asynchronous RISC-V-based SNN processor with custom ISA extensions, which has programmable neuron models, network topology, and on-chip learning algorithms. These features enable the SNN processor to support various learning algorithms for different application domains. Furthermore, a parallel training method is proposed, which reduces training processing time by 33.9%. To verify the programmability, we use the processor to deal with three tasks: image classification, navigation, and keyword spotting. The measurement results on FPGA show that our processor achieves 96.0%, 98.0%, and 94.2% accuracy in the three tasks with three different network topologies and learning algorithms, respectively, which outperform the state-of-the-art works in both programmability and accuracy.