Formal Protocol Coverage Closure for DDR Controllers Using JasperGold or VC Formal
Ederson Davids, Paul Micheals · 2025
In the rapidly evolving landscape of digital design, ensuring the correctness of complex systems such as DDR (Double Data Rate) memory controllers is critical. This work explores the use of formal verification techniques, specifically focusing on protocol coverage closure, to ascertain the reliability and robustness of DDR controllers. Utilizing tools such as