Three Eyed Raven: An On-Chip Side Channel Analysis Framework for Run-Time Evaluation
M Dhilipkumar, Priyanka Bagade, Debapriya Basu Roy · 2025
Side-channel attacks exploit the physical leakages from hardware components, such as power consumption, to break secure cryptographic algorithms and retrieve their secret key. Evaluating implementations of cryptographic algorithms against such analysis is crucial but traditional frameworks require expensive external devices like oscilloscopes, making the process expensive and time-consuming. Recent advancements in on-chip sensors offer a cost-effective, fully on-chip SCA framework, eliminating the need for external devices. In this paper, we propose Raven, an on-chip SCA framework with hardware implementations of Test Vector Leakage Assessment (TVLA), Correlation Power Analysis (CPA), and Deep Learningbased Leakage Assessment (DL-LA), for run-time evaluation of cryptographic implementations. RAVEN leverages on-chip sensors to efficiently assess side-channel security, without requiring any external measurement devices or any customized evaluation platform. Our proposed hardware implementations of TVLA, CPA, and DL-LA are lightweight and the entire architecture including the sensors can fit within the lightweight and low-cost AMD-Xilinx PYNQ FPGA platform. The proposed framework is verified on an FPGA implementation of AES-128 and the corresponding result of TVLA, CPA, and DL-LA closely matches with these algorithm's software implementation while requiring significantly less time and storage.