Logic Locking for Protecting Sensitive Microelectronics: Perspective and Analysis

Jason Hamlet, Jonathan Cruz · 2025

Manufacturing and fielding sensitive government microelectronics requires ensuring the confidentiality and integrity of the design throughout the supply chain. This is particularly important for designs targeting technology nodes for which trusted foundries are not available. Logic locking has enjoyed significant attention as a potential solution to this problem. Though promising, existing locking research focuses on protecting against key recovery attacks and largely ignores concealing design intent. There is also a gap between theoretical security formalisms and approaches for evaluating locks against them. This presents a problem for government adoption of locking approaches as no thorough and practical evaluation criteria for logic locking exists. Therefore, in this work, we clearly outline a threat model for protecting the confidentiality of microelectronics and discuss necessary conditions for securing designs against capable adversaries. We then introduce a preliminary analysis approach for this threat model and evaluate popular locking techniques, finding that they do not satisfy the necessary conditions for secure locking.

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