Design of an Enhanced Multiplier Using Booth Algorithm
Selvam Pragadeswaran, Prasath V. B. Surya, P. Siva · Apple Academic Press eBooks · 2025
An essential operation for getting high-performance outcomes in contemporary digital signal processing and computer applications is efficient multiplication. Most digital signal processors are built on multipliers. On the principle of repeated addition, several multipliers are founded. Numerous various multipliers exist, including the Array Multiplier, Wallace Tree Multiplier, Baugh Wooley Multiplier, Carry Save Multiplier, and Booth Multiplier. When it comes to speed, area, and complexity among the various multipliers, the Booth multiplier takes the lead. The architectures Radix 2, Radix 4, Radix 8, Radix 16, Radix 32, and Radix 64 can be used to create booth multipliers. An improved multiplier design is suggested in this study and is based on a modified version of the Booth algorithm. It uses a Shift and Add strategy as its foundation. A Xilinx ISE design tool is used to create the Booth Multiplier. The Booth algorithm-based suggested improved multiplier has tremendous potential for a wide range of applications, including digital signal processing, cryptographic operations, and multimedia processing, where multiplication is a key computing component. It is an appealing option for next-generation digital systems and processors due to its efficient design and higher performance, which can result in improved system-level performance and decreased power consumption.