Tutorial: Mobile GHz Processor Design Techniques
Byeong‐Gyu Nam · 2012
Mobile computing devices such as smart-phones and smart-pads open up new challenges in mobile processor designs in terms of their speed and power targets. Mobile processors are getting more powerful in order to run increasingly complex software. Therefore, the design of high-speed low-power mobile processors is becoming the major challenge. In this tutorial, design techniques for high-speed mobile CPU and GPU are discussed at several design levels. The talk will go through the architecture, circuit, device level optimization and also consider chip-wise power management techniques. Special considerations for cost-effective microarchitectures, high-speed logic, low-power arithmetic, and DVFS will be highlighted.