Pipelined FFT/IFFT 256 Points Processor
Vaishali Jabade, Gauri Gund, Samiksha Gudgude, Harsh Laddha · 2024
The FFT256 core is a high-performance computational unit designed for efficient 256-point Fast Fourier Transform processing on Xilinx FPGA platforms (XC4SX25-12 and XC5SX25-12). It supports both forward and inverse FFT operations with a pipelined architecture that delivers high-speed processing, outputting results every clock cycle. The core accommodates adjustable data widths (8 to 16 bits) and leverages an FFT algorithm for precision and low resource utilization. Its architecture includes modules like data buffers, FFT16 units, normalization shifters, and complex multipliers, with configurable options for two or three internal data buffers. Verification of the system confirms the design achieves delays between 580 and 839 clock cycles and supports simultaneous data loading and downloading, with minimal RMS error, validating its high accuracy. Ideal for digital signal processing applications, such as OFDM modems and software-defined radios, the FFT256 core offers a powerful solution for complex signal processing with a focus on high throughput and accuracy.