A power-efficient and high-performance single precision floating point unit for AI applications, designed specifically for cost-effective microcontrollers
Allwin Sanjay D., Akash R.V, J. Jerin, Gopal Ram K. · Irish Interdisciplinary Journal of Science & Research · 2025
The growing interest in AI applications within embedded systems has increased the shortcomings of affordable microcontrollers, which frequently do not include hardware floating-point units (FPUs). Historically, these devices have depended on software emulation for floating-point operations, leading to considerable performance limitations and diminished accuracy. This paper tackles this issue by introducing a power-efficient, high-performance single-precision FPU for resource-limited microcontrollers. Using Verilog, we developed a custom hardware FPU where the sub-modules used combinational 3-stage pipeline structure and the top module used 4-stage pipeline structure with sequential operation. A comparison with a nonpipelined version showed performance improvements. The throughput was boosted with a 56.36% gain in maximum clock speed, gain in throughput equals to 369.34%. The other benefits are a 13.19% reduction in the power consumption of the pipelined design. Dedicated hardware uses shared memory which saves more chip area for co-integration of high-performance computational elements such as hardware implementations of the activation functions used in different AI applications.