Worked Examples: Programmable Logic
Thomas C. Hayes, David Abrams, Paul Horowitz · Cambridge University Press eBooks · 2025
In the last chapter’s Worked Examples, we looked at several digital comparators constructed out of gates. We certainly could translate those to structural models in Verilog, but that misses the point. The advantage of an HDL is it frees us from truth tables, Boolean equations, and the need to implement the result with logic gates. Instead, we can describe the desired result behaviorally.