LTH-Aided NAS: An Approach to Generate Ultra-Small Optimized Models for Tiny Devices
Syed Mujibul Islam, Abhishek RoyChoudhury, Shalini Mukhopadhyay, Ishan Sahu, Barnali Basak, S. Dey, Arijit Ukil, Arijit Mukherjee, Arpan Pal · 2024
Deep Neural Networks (DNNs) are increasingly being deployed on edge platforms, driving research in two main directions: (A) automated learning of tiny neural architectures through Neural Architecture Search (NAS), and (B) automated model reduction techniques like pruning. Both approaches aim to meet platform constraints such as latency, memory, and power consumption. While NAS synthesises customized models, it often requires significant search time. Pruning methods such as those based on Lottery Ticket Hypothesis (LTH) quickly produce sparse models but are not directly usable on microcontrollers (MCUs) running lightweight inference engines like TensorFlow Lite for Microcontrollers (TFLM). We propose a novel approach of using pruned models to reduce search space for NAS and hence time by up to 50% and prove it for MCU-based ECG classification and disease detection from x-ray images.